| 전자부품 데이터시트 검색엔진 |
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CDC3RL02YFPR 데이터시트(PDF) 6 Page - Texas Instruments |
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CDC3RL02YFPR 데이터시트(HTML) 6 Page - Texas Instruments |
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6 / 20 page ![]() CDC3RL02 SCHS371C – NOVEMBER 2009 – REVISED JANUARY 2016 www.ti.com Electrical Characteristics (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT MCLK_IN SINUSOIDAL SOURCE VMA Input amplitude 0.3 1.8 V 1-kHz offset –141 10-kHz offset –149 fIN = 26 MHz, VMA = 1.8 VPP 100-kHz offset –152 1-MHz offset –148 Additive phase noise dBc/Hz 1-kHz offset –139 10-kHz offset –146 fIN = 26 MHz, VMA = 0.8 VPP 100-kHz offset –150 1-MHz offset –146 Additive jitter fIN = 26 MHz, VMA = 1.8 VPP, BW = 10–5 MHz 0.41 ps (RMS) MCLK_IN to CLK_OUT_1/2 tDS 12 ns propagation delay DCs Output duty cycle fIN = 26 MHz, VMA > 1.8 VPP 45% 50% 55% CLK_OUT_N OUTPUTS tr 20% to 80% rise time CL = 10 pF to 50 pF 1 5.2 ns tf 20% to 80% fall time CL = 10 pF to 50 pF 1 5.2 ns tsk Channel-to-channel skew CL = 10 pF to 50 pF (CL1 = CL2) –0.5 0.5 ns IOH = –100 μA, reference to VLDO –0.1 VOH High-level output voltage V IOH = –8 mA 1.2 IOL = 20 μA 0.2 VOL Low-level output voltage V IOL = 8 mA 0.55 6 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: CDC3RL02 |
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