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CDC329ADBLE 데이터시트(PDF) 2 Page - Texas Instruments

부품명 CDC329ADBLE
상세설명  1Line to 6Line Clock Driver
PDF  10 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
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CDC329ADBLE 데이터시트(HTML) 2 Page - Texas Instruments

  CDC329ADBLE Datasheet HTML 1Page - Texas Instruments CDC329ADBLE Datasheet HTML 2Page - Texas Instruments CDC329ADBLE Datasheet HTML 3Page - Texas Instruments CDC329ADBLE Datasheet HTML 4Page - Texas Instruments CDC329ADBLE Datasheet HTML 5Page - Texas Instruments CDC329ADBLE Datasheet HTML 6Page - Texas Instruments CDC329ADBLE Datasheet HTML 7Page - Texas Instruments CDC329ADBLE Datasheet HTML 8Page - Texas Instruments CDC329ADBLE Datasheet HTML 9Page - Texas Instruments Next Button
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CDC329A
1-LINE TO 6-LINE CLOCK DRIVER
WITH SELECTABLE POLARITY
SCAS328B – DECEMBER 1992 – REVISED OCTOBER 1998
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
logic diagram (positive logic)
1Y1
1Y2
2Y1
2Y2
3Y
4Y
16
2
3
5
6
8
15
13
12
10
9
1T/C
A
2T/C
3T/C
4T/C
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC
– 0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1)
– 0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state or power-off state,
VO (see Note 1)
– 0.5 V to VCC + 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current into any output in the low state, IO
64 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0)
–18 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0)
– 50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum power dissipation at TA = 55°C (in still air) (see Note 2)
0.77 W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
–65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150
°C and a board trace length of 300 mils.
For more information, refer to the
Package Thermal Considerations application note in the 1994 ABT Advanced BiCMOS Technology
Data Book, literature number SCBD002B.



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