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DP83858VF 데이터시트(PDF) 8 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
부품명 DP83858VF
상세설명  100 Mb/s TX/T4 Repeater Interface Controller (100RIC8??
PDF  37 Pages
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제조업체  NSC [National Semiconductor (TI)]
홈페이지  http://www.national.com
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2.3 EEPROM Interface
RDIO
I/O/Z, L
—
Register Data I/O: Serial data input/output transfers data to/from the internal regis-
ters. Serial protocol conforms to the IEEE 802.3u MII (Media Independent Interface)
specification.
Note: Input buffer has a weak pull-up.
RDC
I
—
Register Data Clock: All data transfers on RDIO are synchronized to the rising edge
of this clock. RDC is limited to a maximum frequency of 2.5 MHz. At least 3 cycles
of RDC must be provided during assertion of /RST (pin 103) to ensure proper reset
of all internal blocks.
/SDV
I
low
Serial Data Valid: Asserted when a valid read or write command is present. Used to
detect disconnection of the management bus so that synchronization is not lost. If not
used, tie this pin to GND.
Note: Input buffer has a weak pull-up.
/ACTIVEO
O/OC, M
low
Active Out: Enable for the IR_VECT[4:0] and /IR_ACTIVE signals. Used in multi-
DP83858 systems to enable the external buffers driving these Inter Repeater Bus
signals.
A pull up of 680
Ω must be used with this signal.
Note: A table showing pin type designation is given in section 2.5
Signal Name Type Active
Pin Description
EE_CS
O, L
high
EEPROM Chip Select: Asserted during reads to EEPROM.
EE_CK
O, L
—
EEPROM Serial Clock: Local Clock
÷ 32 = 0.78125MHz
EE_DO
I
—
EEPROM Serial Data Out: Connected to the serial data out of the EEPROM.
EE_DI
O, L
—
EEPROM Serial Data In: Connected to the serial data in of the EEPROM.
Signal Name
Type
Active
Description



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