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CDCM1802 데이터시트(PDF) 8 Page - Texas Instruments

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부품명 CDCM1802
상세설명  CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output
PDF  30 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI1 - Texas Instruments

CDCM1802 데이터시트(HTML) 8 Page - Texas Instruments

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I − Load − mA
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
−5
0
5
10
15
20
25
30
35
VDD = 3.3 V
G006
f - Frequency - GHz
0.1
0.3
0.5
0.7
0.9
1.1
1.3
1.5
50
60
70
80
90
100
110
CMOS Running, PECL Off (Mode 10)
CMOS and PECL Running, No Load
CMOS Off, PECL Running
CMOS and PECL Running (Mode 3)
f − Frequency − GHz
0.40
0.45
0.50
0.55
0.60
0.65
0.70
0.75
0.80
0.85
0.90
0.1
0.3
0.5
0.7
0.9
1.1
1.3
1.5
TA = 25°C
Load = 50 W to VDD − 2 V
VDD = 3.6 V
VDD = 3.3 V
VDD = 3 V
G003
f − Frequency − MHz
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
25
75
125 175 225 275 325 375 425 475
TA = 25°C
Load = See Figure 10
VDD3 = 3 V
VDD3 = 3.6 V
VDD = 3.3 V
G004
−160
−155
−150
−145
−140
−135
−130
−125
−120
−115
−110
VDD = 3.3 V
TA = 25°C
f = 622 MHz
÷1 Mode
f − Frequency Offset From Carrier − Hz
10
100
1k
100M
10k
100k
10M
1M
G001
−160
−155
−150
−145
−140
−135
−130
−125
−120
−115
−110
−105
−100
VDD = 3.3 V
TA = 25°C
f = 250 MHz
÷1 Mode
f − Frequency Offset From Carrier − Hz
10
100
1k
100M
10k
100k
10M
1M
G002
CDCM1802
SCAS759B – APRIL 2004 – REVISED NOVEMBER 2015
www.ti.com
6.12 Typical Characteristics
Figure 1. Additive Phase Noise vs
Figure 2. Additive Phase Noise vs
Frequency Offset From Carrier
− LVPECL
Frequency Offset From Carrier
− LVCMOS
Figure 3. Amplitude PECL Peak-to-Peak vs Frequency
Figure 4. Amplitude CMOS Peak-to-Peak vs Frequency
Figure 5. Supply current vs Frequency
Figure 6. Output Reference Voltage (VBB) vs Load
8
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Product Folder Links: CDCM1802



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