CDCVF111FN datasheet(1/11 Pages) TI1

부품명	CDCVF111FN

상세설명	1:9 DIFFERENTIAL LVPECL CLOCK DRIVER

PDF	11 Pages

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제조업체	TI1 [Texas Instruments]

홈페이지	http://www.ti.com

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CDCVF111

1:9 DIFFERENTIAL LVPECL CLOCK DRIVER

SCAS670B – SEPTEMBER 2001 – REVISED JUNE 2002

1

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

D Low-Output Skew for Clock-Distribution

Applications

D Differential Low-Voltage Pseudo-ECL

(LVPECL) Compatible Inputs and Outputs

D Distributes Differential Clock Inputs to Nine

Differential Clock Outputs

D Output Reference Voltage (VREF) Allows

Distribution From a Single-Ended Clock

Input

D Packaged In a 28-Pin Plastic Chip Carrier

description

The differential LVPECL clock-driver circuit

distributes one pair of differential LVPECL clock

inputs (CLKIN, CLKIN) to nine pairs of differential

clock (Y, Y) outputs with minimum skew for clock

distribution. It is specifically designed for driving

50-

Ω transmission lines.

The VREF output can be strapped to the CLKIN input for a single-ended CLKIN input.

The CDCVF111 is characterized for operation from –40

°C to 85°C.

FUNCTION TABLE

INPUTS

OUTPUTS

CLKIN

Yn

X

L

H

L

HL

H

LH

L

VREF

L

H

VREF

H

L

VREF

LH

L

VREF

H

L

H

Copyright

 2002, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

32 1

13 14

5

6

7

8

9

10

11

Y0

Y1

VCC

Y1

Y2

Y8

Y7

VCC

Y7

Y6

4

15 16 17 18

28 27 26

25

24

23

22

21

20

19

12

FN PACKAGE

(TOP VIEW)

NC – No internal connection

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