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CLC5903VLA/NOPB 데이터시트(PDF) 7 Page - Texas Instruments

부품명 CLC5903VLA/NOPB
상세설명  Dual Digital Tuner/AGC
PDF  31 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI1 - Texas Instruments

CLC5903VLA/NOPB 데이터시트(HTML) 7 Page - Texas Instruments

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6
CLC5903VLA Pinout
Pin Descriptions
Signal
PQFP Pin
FBGA Pin
Description
MR
45
M4
MASTER RESET, Active low
Resets all registers within the chip. ASTROBE and BSTROBE are asserted during
MR.
AIN[13:0],
BIN[13:0]
4:10,12:18,
22:28,
30:36
D3,A1,C2,
B1,E4,D2,
C1,E3,D1,
F4,F3,E1,
E2,G4;
G2,G3,H2,
H1,H3,J2,
J1,J3,H4,
K1,J4,K2,
L1,K3
INPUT DATA, Active high
2’s complement input data. AIN[13] and BIN[13] are the MSBs. The data is clocked
into the chip on the rising edge of the corresponding clock (CKA, CKB). The
CLC595X connects directly to these input pins with no additional logic. Tie unused
input bits low.
124
125
127
126
128
121
122
123
117
119
120
VSS
TMS
116
118
TCK
TDI
TDO
AGAIN[2]
AGAIN[0]
ASTROBE
VDDIO
AGAIN[1]
SCAN_EN
TRST
NC
105
107
108
110
112
114
115
103
104
106
109
111
113
VDD
POUT_SEL[1]
VSSIO
POUT[1]
VDDIO
POUT[3]
POUT_SEL[0]
POUT_SEL[2]
POUT_EN
POUT[0]
POUT[2]
POUT[4]
VSS
60
61
63
62
64
57
58
59
53
55
56
A[1]
A[3]
52
54
A[2]
A[4]
A[5]
D[6]
VSSIO
CE
VDDIO
D[7]
WR
A[0]
RD
41
43
44
46
48
50
51
39
40
42
45
47
49
VSS
VDD
SI
NC
BSTROBE
BGAIN[1]
A[6]
A[7]
VSSIO
MR
BGAIN[0]
BGAIN[2]
VDDIO
CLC5903VLA
Dual Digital Tuner / AGC
(Top View)
Figure 4. CLC5903VLA PQFP Pinout



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