ADF4153BCP datasheet(4/24 Pages) AD

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ADF4153

Rev. A | Page 4 of 24

1 Operating temperature is B version: −40°C to +80°C.

2 Use a square wave for frequencies below fMIN.

3 Guaranteed by design. Sample tested to ensure compliance.

4 AC coupling ensures AVDD/2 bias. See Figure 16 for typical circuit.

5 This figure can be used to calculate phase noise for any application. Use the formula –217 + 10log(fPFD) + 20logN to calculate in-band phase noise performance as seen

at the VCO output. The value given is the lowest noise mode.

6 The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20logN (where N is the N divider value).

The value given is the lowest noise mode.

7 The phase noise is measured with the EVAL-ADF4153EB1 evaluation board and the HP8562E spectrum analyzer.

8 fREFIN = 26 MHz; fPFD = 10 MHz; offset frequency = 1 kHz; RFOUT = 1750 MHz; N = 175; loop B/W = 20 kHz; lowest noise mode.

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