HD3SS460

ML0+

ML0>

ML1+

ML1>

ML2+

ML2>

ML3+

ML3>

SSTX

SSRX

RX1+

RX1>

TX1+

TX1>

TX2+

TX2>

RX2+

RX2>

No AC Coupling Caps

USB3 Host

0.1 µF

0.1 µF

Copyright © 2016, Texas Instruments Incorporated

13

HD3SS460

www.ti.com

SLLSEM7B – JANUARY 2015 – REVISED JUNE 2016

Product Folder Links: HD3SS460

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Copyright © 2015–2016, Texas Instruments Incorporated

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

HD3SS460 can be utilized for a wide range of muxing needs. This is general purpose passive cross-point switch.

The channels have independent adaptive common mode tracking allowing flexibility. As long as recommended

electrical use conditions are met the device can be used number of ways as described in Table 1.

NOTE

HD3SS460 does not provide common mode biasing for the channel. Therefore it is

required that the device is biased from either side for all active channels.

9.2 USB SS and DP as Alternate Mode

HD3SS460 can be used USB Type-C ecosystem with DP as alternate mode in two distinct application

configurations – one is for DP Source/USB Host, the other one for the DP Sink/USB Device/Dock. Figure 3 and

Figure 4 illustrate typical application block diagrams for these two cases. Detail schematics are illustrated in

Detailed Design Procedure section. Other applications and or use cases possible where these examples can be

used as general guidelines.

Figure 3 and Figure 4 depict the AC coupling capacitor placement examples. TI recommends placing the

capacitors as shown in the illustrations for the backward compatibility and interoperability purposes as some of

the existing USB systems may present Vcm, exceeding the typical range of 0–2 V on SS differential pairs.

Figure 3. Block Diagram for a Type C Interface Using DP as Alternate Mode – Source/Host