ADS7890

SLAS409 − DECEMBER 2003

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21

TIMING AND CONTROL

Refer to the DEVICE OPERATION IN SPI INTERFACE, DEVICE OPERATION IN DSP INTERFACE and

FRAME ABORT in the DESCRIPTION AND TIMING sections.

READING DATA

The ADS7890 outputs serial data in straight binary format as listed in Table 1. Also refer to Figure 1 and Figure

2 for more details.

DESCRIPTION

ANALOG VALUE

BINARY CODE

HEX CODE

Full scale

Vref − 1 LSB

11 1111 1111 1111

3FFF

Midscale

Vref/2

10 0000 0000 0000

2000

Midscale − 1 LSB

Vref/2 − 1 LSB

01 1111 1111 1111

1FFF

Zero

0 V

00 0000 0000 0000

000

(1) Full-scale range = Vref and least significant bit (LSB) = Vref/16384

Reset

Refer to the POWERDOWN/RESET section for the device reset sequence.

It is recommended to reset the device after power on. A reset can be issued once the power has reached 95%

of its final value.

PWD/RST

is an asynchronous active low input signal. A current conversion is aborted no later than 45 ns after

the converter is in the reset mode. In addition, the device output SDO goes to three-state. The converter returns

back to normal operation mode immediately after the PWD/RST input is brought high.

Data is not valid for the first four conversions after a device reset.

Powerdown

Refer to the POWERDOWN/RESET section for the device powerdown sequence.

brought high.

After this period, normal conversion and sampling operation can be started as discussed in previous sections.

Data is not valid for the first four conversions after a device reset.

Nap Mode

The device enters nap mode at the end of every conversion (with BUSY falling edge). The device powers up

again on the 8th SDO rising edge in the next frame. Refer to Figure 1 and Figure 2 for more information. The

power dissipation during nap mode is 10 mW. This offers power savings when the device is operated at lower

throughput. Refer to Figure 28 for more information on power saving.