CPC75282KA datasheet(16/19 Pages) IXYS

16 / 19 page

PRELIMINARY

INTEGRATED CIRCUITS DIVISION

CPC75282

PRELIMINARY

R00E

increases. If the device temperature rises sufficiently,

the temperature shutdown mechanism will activate

and the device will enter the All-Off state.

2.10 Thermal Shutdown

The thermal shutdown mechanism activates when the

device die temperature reaches a minimum of 110°C,

placing the device in the All-Off state regardless of

logic input. During thermal shutdown events the TSDx

pin will output a logic low with a nominal 0V level. A

logic high is output from the TSDx pin during normal

operation with a typical output level equal to VDD.

If presented with a short duration transient, such as a

lightning event, the thermal shutdown feature will

typically not activate. But in an extended power-cross

event, the device temperature will rise and the thermal

shutdown mechanism will activate forcing the switches

to the All-Off state. At this point the current measured

into TLINE or RLINE will drop to zero. Once the device

enters thermal shutdown, it will remain in the All-Off

state until the temperature of the device drops below

the de-activation level of the thermal shutdown circuit.

This permits the device to autonomously return to

normal operation. If the transient has not passed,

current will again flow up to the value allowed by the

dynamic DC current limiting of the switches and

heating will resume, reactivating the thermal shutdown

mechanism. This cycle of entering and exiting the

thermal shutdown mode will continue as long as the

fault condition persists. If the magnitude of the fault

condition is great enough, the external secondary

protector will activate, shunting the fault current to

ground.

2.11 External Protection Elements

The CPC75282 requires only over-voltage secondary

protection on the loop side of the device. The

integrated protection feature described above negates

the need for additional external protection on the SLIC

side. The secondary protector must limit voltage

transients to levels that do not exceed the breakdown

voltage or input-output isolation barrier of the

CPC75282. A foldback or crowbar type protector is

recommended to minimize stresses on the

CPC75282.

Consult IXYS Integrated Circuits Division’s application

note, AN-100, “Designing Surge and Power Fault

Protection Circuits for Solid State Subscriber Line

Interfaces,” for equations related to the specifications

of external secondary protectors, fused resistors, and

PTCs.

CPC75282KA 데이터시트(PDF) 16 Page - IXYS Corporation

CPC75282KA 데이터시트(HTML) 16 Page - IXYS Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

데이터시트 다운로드

링크 URL