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Time (s)

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ROUT

C001

MAX3232

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SLLS410K – JANUARY 2000 – REVISED JANUARY 2015

Standard Application (continued)

10.2.1 Design Requirements

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•

Maximum recommended bit rate is 250 kbit/s.

10.2.2 Detailed Design Procedure

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All DIN, FORCEOFF and FORCEON inputs must be connected to valid low or high logic levels.

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Select capacitor values based on VCC level for best performance.

10.2.3 Application Curves

Figure 7. 250 kbit/s Driver to Receiver Loopback Timing Waveform,

11 Power Supply Recommendations

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