 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
AT89C5131-RDTIL 데이터시트(PDF) 98 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
AT89C5131-RDTIL 데이터시트(HTML) 98 Page - ATMEL Corporation |
|
|
98 / 176 page  98 AT89C5131 4136B–USB–09/03 Two Wire Interface (TWI) Introduction The Synchronous Serial Link Controller (SSLC) provides the selection of one synchro- nous serial interface among the two most popular ones: • Two Wire Interface (TWI). • Serial Peripheral Interface (SPI) When an interface is selected, the other is no longer available, its usage is exclusive. This section describes the TWI. In the rest of the section SSLC means TWI. The TWI bus is a bi-directional two-wire serial communication standard. It is designed primarily for simple but efficient integrated circuit (IC) control. The system is comprised of two lines, SCL (Serial Clock) and SDA (Serial Data) that carry information between the ICs connected to them. The serial data transfer is limited to 400 Kbit/s in standard mode. Various communication configurations can be designed using this bus. Figure 46 shows a typical TWI bus configuration. All the devices connected to the bus can be master and slave. Figure 46. TWI Bus Configuration SCL SDA device2 device1 deviceN device3 ... |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
