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LM48821TLEVAL 데이터시트(PDF) 16 Page - Texas Instruments

부품명 LM48821TLEVAL
상세설명  Direct Coupled, Ultra Low Noise
PDF  24 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
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LM48821TLEVAL 데이터시트(HTML) 16 Page - Texas Instruments

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LM48821, LM48821TLEVAL
SNAS354A – JUNE 2007 – REVISED MAY 2013
www.ti.com
Table 3. Volume Control
VD4
VD3
VD2
VD1
VD0
Gain (dB)
0
0
0
0
0
–76
0
0
0
0
1
–62
0
0
0
1
0
–52
0
0
0
1
1
–44
0
0
1
0
0
–38
0
0
1
0
1
–34
0
0
1
1
0
–30
0
0
1
1
1
–27
0
1
0
0
0
–24
0
1
0
0
1
–21
0
1
0
1
0
–18
0
1
0
1
1
–16
0
1
1
0
0
–14
0
1
1
0
1
–12
0
1
1
1
0
–10
0
1
1
1
1
–8
1
0
0
0
0
–6
1
0
0
0
1
–4
1
0
0
1
0
–2
1
0
0
1
1
0
1
0
1
0
0
2
1
0
1
0
1
4
1
0
1
1
0
6
1
0
1
1
1
8
1
1
0
0
0
10
1
1
0
0
1
12
1
1
0
1
0
13
1
1
0
1
1
14
1
1
1
0
0
15
1
1
1
0
1
16
1
1
1
1
0
17
1
1
1
1
1
18
I2C COMPATIBLE INTERFACE
The LM48821 uses a serial data bus that conforms to the I2C protocol. Controlling the chip’s functions is
accomplished with two wires: serial clock (SCL) and serial data (SDA). The clock line is uni-directional. The data
line is bi-directional (open-collector). The maximum clock frequency specified by the I2C standard is 400kHz. In
this discussion, the master is the controlling microcontroller and the slave is the LM48821.
The bus format for the I2C interface is shown in Figure 57. The bus format diagram is broken up into six major
sections: The Start Signal, the I2C Address, an Acknowledge bit, the I2C data, second Acknowledge bit, and the
Stop Signal.
The start signal is generated by lowering the data signal while the clock signal is high. The start signal will alert
all devices attached to the I2C bus to check the incoming address against their own address.
The 8-bit chip address is sent next, most significant bit first. The data is latched in on the rising edge of the clock.
Each address bit must be stable while the clock level is high.
16
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Product Folder Links: LM48821 LM48821TLEVAL



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