DP8571 datasheet(13/24 Pages) NSC

13 / 24 page

Functional Description (Continued)

INPUT CLOCK SELECTION

The input frequency to the timers may be selected Each

timer has a prescaler that gives a wide selection of clocking

rates Table IV shows the range of programmable clocks

available and the corresponding setting in the Timer Control

the input to Timer 0 This is a cascade option for the timers

and allows them to be clocked as a 32-bit down counter

TABLE IV Programmable Timer Input Clocks

Selected Clock

Timer 1 Output

Crystal Oscillator

(Crystal Oscillator)4

935 ms (107 kHz)

1 ms (1 kHz)

10 ms (100 Hz)

110 Second (10 Hz)

1 Second (1 Hz)

Note that the second and third selections are not fixed fre-

quencies but depend on the crystal oscillator frequency

chosen

Since the input clock frequencies are usually running asyn-

chronously to the timer StartStop control bit a 1 clock cy-

cle error may result This error results when the StartStop

occurs just after the clock edge (max error) To minimize

this error on all clocks an independent prescaler is used for

each timer and is designed so that its StartStop error is

less than 1 clock cycle

The count holdgate bit in the Timer Control Register can

be used to suspend the timer operation in modes 0 1 and 2

(in mode 3 it is the trigger input) Suspending the tim-

er causes the same synchronization error that starting the

timer does The range of errors is specified in Table V

TABLE V Maximum Synchronization Errors

Clock Selected

Error

External

Ext Clock Period

Crystal

1 Crystal Clock Period

Crystal4

1 Crystal Clock Period

107 kHz

32 ms

1 kHz

32 ms

100 Hz

32 ms

10 Hz

32 ms

1Hz

32 ms

MODES OF OPERATION

Bits M0 and M1 in the Timer Control Registers are used to

specify the modes of operation The mode selection is de-

scribed in Table VI

TABLE VI Programmable Timer Modes of Operation

Function

Modes

Single Pulse Generator

Mode 0

Rate Generator Pulse Output

Mode 1

Square Wave Output

Mode 2

Retriggerable One Shot

Mode 3

MODE 0 SINGLE PULSE GENERATOR

When the timer is in this mode the output will be initially low

if the Timer StartStop bit is low (stopped) When this mode

is initiated the timer output will go high on the next falling

edge of the prescaler’s input clock the contents of the

TLF9979 – 11

FIGURE 7 DP8571A Timer Block Diagram

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