SN74LVC1G02

SCES213X – APRIL 1999 – REVISED APRIL 2014

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9 Detailed Description

9.1 Overview

The SN74LVC1G02 device contains one 2-input positive-NOR gate and performs the Boolean function Y = A + B

the outputs, preventing damaging current backflow through the device when it is powered down.

The DPW package technology is a major breakthrough in IC packaging. Its tiny 0.64 mm square footprint saves

significant board space over other package options while still retaining the traditional manufacturing friendly lead

pitch of 0.5 mm.

9.2 Functional Block Diagram

9.3 Feature Description

•

Wide operating voltage range.

–

Operates from 1.65 V to 5.5 V.

•

Allows down voltage translation.

•

Inputs accept voltages to 5.5 V.

•

9.4 Device Functional Modes

Function Table

INPUTS

OUTPUT

Y

A

B

H

X

L

X

H

L

L

L

H

10

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