TL16PC564BLVI

PCMCIA UNIVERSAL ASYNCHRONOUS RECEIVER TRANSMITTER

SLLS627− SEPTEMBER 2004

28

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

WR or RD

tsu16

td29

td30, th16

td31, td32

tw14

td25

CS

SA8,

SAD(7 − 0)

ALE

50%

50%

50%

50%

50%

50%

50%

50%

50%

50%

tw11

th15

td26, td27

td28

µP Data

µP Address

tw12, tw13

Figure 10. Subsystem Intel-Mode Timing Waveforms

µP Out

AS

DS

CS

R/W

SA8,

SAD(7 − 0)

µP Address

td34

90%

10%

td39

10%

10%

10%

10%

90%

10%

µP Data Out

µP Data In

10%

90%

90%

10%

10%

90%

10%

90%

10%

10%

90%

90%

th18

tsu17

td33

td38

th17

td37

td35

td36

tw15

tw17

tw16

90%

90%

10%

90%

90%

90%

NOTE A: Figures 10 and 11 are from the microprocessor perspective, not from the UART perspective.

Figure 11. Subsystem Zilog-Mode Timing Waveforms

Not Recommended For New Designs