CAP1293 datasheet(40/63 Pages) MICROCHIP

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CAP1293

DS00001566B-page 40

 2013-2015 Microchip Technology Inc.

Bit 0 - CS1_PTRN - Determines whether CS1 is considered as part of the Multiple Touch Pattern.

5.17

Base Count Out of Limit Register

The Base Count Out of Limit Register indicates which sensor inputs have base counts out of limit (see Section 4.4, "Sen-

sor Input Calibration"). When these bits are set, the BC_OUT bit is set (see Section 5.2, "Status Registers").

For all bits in this register:

• ‘0’ - The base count for the specified sensor input is in the operating range.

• ‘1’ - The base count of the specified sensor input is not in the operating range.

Bit 2 - BC_OUT_3 - Indicates whether CS3 has a base count out of limit.

Bit 1 - BC_OUT_2 - Indicates whether CS2 has a base count out of limit.

Bit 0 - BC_OUT_1 - Indicates whether CS1 has a base count out of limit.

5.18

Recalibration Configuration Register

The Recalibration Configuration register controls some recalibration routine settings (see Section 4.4, "Sensor Input

Calibration") as well as advanced controls to program the Sensor Input Threshold register settings.

Bit 7 - BUT_LD_TH - Enables setting all Sensor Input Threshold registers by writing to the Sensor Input 1 Threshold

• ‘0’ - Each Sensor Input X Threshold register is updated individually.

• ‘1’ (default) - Writing the Sensor Input 1 Threshold register will automatically overwrite the Sensor Input Threshold

registers for all sensor inputs (Sensor Input Threshold 1 through Sensor Input Threshold 3). The individual Sensor

Input X Threshold registers (Sensor Input 2 Threshold and Sensor Input 3 Threshold) can be individually updated

at any time.

Bit 6 - NO_CLR_INTD - Controls whether the accumulation of intermediate data is cleared if the noise status bit is set.

• ‘0’ (default) - The accumulation of intermediate data is cleared if the noise status bit is set.

• ‘1’ - The accumulation of intermediate data is not cleared if the noise status bit is set.

APPLICATION NOTE: Bits 5 and 6 should both be set to the same value. Either both should be set to ‘0’ or both

should be set to ‘1’.

Bit 5 - NO_CLR_NEG - Controls whether the consecutive negative delta counts counter is cleared if the noise status bit

is set.

‘0’ (default) - The consecutive negative delta counts counter is cleared if the noise status bit is set.

‘1’ - The consecutive negative delta counts counter is not cleared if the noise status bit is set.

TABLE 5-31:

BASE COUNT OUT OF LIMIT REGISTER

Addr

R/W

B7B6B5B4B3B2B1B0

Default

2Eh

Base Count

Out of Limit

-----

BC_

OUT_

BC_

OUT_

BC_

OUT_

00h

TABLE 5-32:

RECALIBRATION CONFIGURATION REGISTERS

Addr

R/W

Default

2Fh

R/W

Recalibration

Configuration

BUT_

LD_TH

NO_CLR

_INTD

NO_CLR

_NEG

NEG_DELTA_

CNT[1:0]

CAL_CFG[2:0]

8Ah

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