SHUTDOWN

SENSE

OUT

IN

DAP

1

2

3

4

8

7

6

5

ERROR

FEEDBACK

GND

Error Pullup

Resistor

TAP

R2

R1

GND

SHUTDOWN

SENSE

OUT

TAP

IN

DAP

1

2

3

4

8

7

6

5

ERROR

FEEDBACK

GND

Error Resistor

LP2986

SNVS137I – MARCH 1999 – REVISED SEPTEMBER 2015

www.ti.com

10 Layout

10.1 Layout Guidelines

For best overall performance, place all circuit components on the same side of the circuit board and as near as

practical to the respective LDO pin connections. Place ground return connections to the input and output

capacitor, and to the LDO ground pin as close to each other as possible, connected by a wide, component-side,

copper surface. The use of vias and long traces to create LDO circuit connections is strongly discouraged and

negatively affects system performance. This grounding and layout scheme minimizes inductive parasitics, and

thereby reduces load-current transients, minimizes noise, and increases circuit stability. A ground reference

plane is also recommended and is either embedded in the PCB itself or located on the bottom side of the PCB

opposite the components. This reference plane serves to assure accuracy of the output voltage, shield noise,

and behaves similar to a thermal plane to spread (or sink) heat from the LDO device. In most applications, this

ground plane is necessary to meet thermal requirements.

10.2 Layout Examples

Figure 39. WSON Layout with Internal Resistor Divider

Figure 40. WSON Layout with External Resistor Divider

20

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