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LP2996M/NOPB 데이터시트(PDF) 10 Page - Texas Instruments

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부품명 LP2996M/NOPB
상세설명  DDR Termination Regulator
PDF  28 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI1 - Texas Instruments

LP2996M/NOPB 데이터시트(HTML) 10 Page - Texas Instruments

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NUMBER OF VIAS
40
50
60
70
80
90
100
0
200
400
600
800
1000
AIRFLOW (Linear Feet per Minute)
SOP Board
JEDEC Board
150
160
140
170
180
100
110
120
130
80
90
LP2996-N
SNOSA40J – NOVEMBER 2002 – REVISED MARCH 2013
www.ti.com
Figure 21.
θJA vs Airflow (SOIC-8)
Additional improvements can be made by the judicious use of vias to connect the part and dissipate heat to an
internal ground plane. Using larger traces and more copper on the top side of the board can also help. With
careful layout it is possible to reduce the
θJA further than the nominal values shown in Figure 21
Layout is also extremely critical to maximize the output current with the WQFN package. By simply placing vias
under the DAP the
θJA can be lowered significantly. Figure 22 shows the WQFN thermal data when placed on a
4-layer JEDEC board with copper thickness of 0.5/1/1/0.5 oz. The number of vias, with a pitch of 1.27 mm, has
been increased to the maximum of 4 where a
θJA of 50.41°C/W can be obtained. Via wall thickness for this
calculation is 0.036 mm for 1oz. Copper.
Figure 22. WQFN-16
θJA vs # of Vias (4 Layer JEDEC Board))
Additional improvements in lowering the
θJA can also be achieved with a constant airflow across the package.
Maintaining the same conditions as above and utilizing the 2x2 via array, Figure 23 shows how the
θJA varies
with airflow.
10
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Copyright © 2002–2013, Texas Instruments Incorporated
Product Folder Links: LP2996-N



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