LP3923

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SNVS567B – APRIL 2010 – REVISED MAY 2013

Table 9. Register 0x1C – MISC Control 1

EN_APU_TSD

0 - do not start PMU automatically after TSD event

1 - start PMU automatically after TSD event

PS_HOLD_DELAY

0 - PMU powerdown after PS_HOLD has been low for 35 ms

1 - PMU powerdown after PS_HOLD has been low for 350 ms

LDO OUTPUT VOLTAGE PROGRAMMING

The following table summarizes the supported output voltages for LP3923. Default voltages after start-up

sequences have been highlighted in bold.

Data Code LDO_Vx_OP[x]

LDOx [V]

Data Code LDO_Vx_OP[x]

LDOx [V]

8h'00

1.20

8h'10

2.20

8h'01

1.25

8h'11

2.40

8h'02

1.30

8h'12

2.50

8h'03

1.35

8h'13

2.60

8h'04

1.40

8h'14

2.65

8h'05

1.45

8h'15

2.70

8h'06

1.50

8h'16

2.75

8h'07

1.55

8h'17

2.80

8h08

1.60

8h'18

2.85

8h'09

1.65

8h'19

2.90

8h'0A

1.70

8h'1A

2.95

8h'0B

1.75

8h'1B

8h'0C

8h'1C

3.05

8h'0D

1.85

8h'1D

3.10

8h'0E

1.90

8h'1E

3.20

8h'0F

2.00

8h'1F

3.3

(1)

See Table 1.

CHARGING CURRENT PROGRAMMING

Table 10. The following table summarizes the supported currents for LP3923.

PROG_ ICHG[4]

PROG_ ICHG[3]

PROG_ ICHG[2]

PROG_ ICHG[1]

PROG_ ICHG[0]

ICHG (mA)

0

0

0

0

0

50

0

0

0

0

1

100

0

0

0

1

0

150

0

0

0

1

1

200

0

0

1

0

0

250

0

0

1

0

1

300

0

0

1

1

0

350

0

0

1

1

1

400 (Default)

0

1

0

0

0

450

0

1

0

0

1

500

0

1

0

1

0

550

0

1

0

1

1

600

0

1

1

0

0

650

0

1

1

0

1

700

0

1

1

1

0

750

0

1

1

1

1

800

1

0

0

0

0

850

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