TLC2872ZP datasheet(7/17 Pages) TI1

7 / 17 page

TLC2872Z, TLC2872Y

Advanced LinCMOS

™ RAIL-TO-RAIL

DUAL OPERATIONAL AMPLIFIERS

SLOS117 – OCTOBER 1992

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

electrical characteristics, VDD = 5 V, TA = 25°C (unless otherwise noted)

PARAMETER

TEST CONDITIONS

TLC2872Y

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VIO

Input offset voltage

300

2500

µV

Input offset voltage long-term drift (see Note 4)

VIC = 0,

VO = 0,

0.002

µV/mo

IIO

Input offset current

RS = 50 Ω

0.0005

IIB

Input bias current

0.001

– 0.3

VICR

Common mode input voltage range

RS =50 Ω

|VIO | ≤ 5mV

4.2

VICR

Common-mode input voltage range

RS = 50 Ω,

|VIO | ≤ 5 mV

3.5

IOH = – 20 µA

4.95

4.99

VOH

High-level output voltage

IOH = – 200 µA

4.85

4.93

IOH = – 1 mA

4.25

4.65

VIC = 2.5 V,

IOL = 50 µA

0.01

0.02

VOL

Low-level output voltage

VIC = 2.5 V,

IOL = 500 µA

0.09

0.15

VIC = 2.5 V,

IOL = 5 mA

0.9

1.5

AVD

Large signal differential voltage amplification

VIC = 2.5 V,

RL = 10 kΩ†

V/mV

AVD

Large-signal differential voltage amplification

VO = 1 V to 4 V

RL = 1 MΩ†

175

V/mV

rid

Differential input resistance

1012

Ω

Common-mode input resistance

1012

Ω

Common-mode input capacitance

f = 10 kHz,

P package

Closed-loop output impedance

f = 1 MHz,

AV = 10

140

Ω

CMRR

Common-mode rejection ratio

VIC = 0 to 2.7 V,

RS = 50 Ω

VO = 2.5 V,

kSVR

Supply voltage rejection ratio (

∆VDD± /∆VIO)

VDD = 4.4 V to 16 V,

VIC = VDD /2,

kSVR

Supply voltage rejection ratio (

∆VDD± /∆VIO)

No load

IDD

Supply current

VO = 2.5 V,

No load

2.2

† Referenced to 2.5 V

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