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DS3650M 데이터시트(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
부품명 DS3650M
상세설명  Quad Differential Line Receivers
PDF  10 Pages
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제조업체  NSC [National Semiconductor (TI)]
홈페이지  http://www.national.com
Logo NSC - National Semiconductor (TI)

DS3650M 데이터시트(HTML) 2 Page - National Semiconductor (TI)

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Absolute Maximum Ratings (Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Power Supply Voltages
V
CC
+7.0 V
DC
V
EE
−7.0 V
DC
Differential-Mode Input Signal Voltage
Range, V
IDR
±6.0 V
DC
Common-Mode Input Voltage Range,
V
ICR
±5.0 V
DC
Strobe Input Voltage, V
I(S)
5.5 V
DC
Storage Temperature Range
−65˚C to +150˚C
Lead Temperature
(Soldering, 4 seconds)
260˚C
Maximum Power Dissipation (Note 1)
at 25˚C
Cavity Package
1509 mW
Molded DIP Package
1476 mW
SO Package
1051 mW
Operating Conditions
Min
Max
Units
Supply Voltage, V
CC
4.75
5.25
V
DC
Supply Voltage, V
EE
−4.75
−5.25
V
DC
Operating Temperature, T
A
0
+70
˚C
Output Load Current, I
OL
16
mA
Differential-Mode Input
Voltage Range, V
IDR
−5.0
+5.0
V
DC
Common-Mode Input
Voltage Range, V
ICR
−3.0
+3.0
V
DC
Input Voltage Range
Input to GND, V
IR
−5.0
+3.0
V
DC
Note 1: Derate cavity package 10.1 mW/˚C above 25˚C; derate molded DIP
package 11.8 mW/˚C above 25˚C; derate SO package 8.41 mW/˚C above
25˚C.
Electrical Characteristics (Notes 3, 4)
(V
CC = 5.0 VDC,VEE = −5.0 VDC, Min ≤ TA ≤ Max, unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
IS
Input Sensitivity, (Note 6)
(Common-Mode Voltage Range =
Min
≤ V
CC ≤ Max
±25.0
mV
−3V
≤ V
IN ≤ 3V)
Min
≥ V
EE ≥ Max
I
IH(I)
High Level Input Current to
(
Figure 5 )75
µA
Receiver Input
I
IL(I)
Low Level Input Current to
(
Figure 6 )
−10
µA
Receiver Input
I
IH(S)
High Level Input Current to Strobe Input
(
Figure 3 )V
IH(S) = 2.4V
40
µA
V
IH(S) = VCC
1mA
I
IL(S)
Low Level Input Current to Strobe Input
V
IH(S) = 0.4V
−1.6
mA
V
OH
High Level Output Voltage
(
Figure 1 )
2.4
V
V
OL
Low Level Output Voltage
(
Figure 1 )
0.45
V
I
OS
Short-Circuit Output Current (Note 5)
(
Figure 4 )
−18
−70
mA
I
OFF
Output Disable Leakage Current
(
Figure 7 )40
µA
I
CCH
High Logic Level Supply Current
(
Figure 2 )45
60
mA
from V
CC
I
EEH
High Logic Level Supply Current
(
Figure 2 )
−17
−30
mA
from V
EE
Note 2: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they
are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation.
Note 3: Unless otherwise specified, min/max limits apply across the 0˚C to +70˚C range for the DS3650. All typical values are for TA = 25˚C, VCC = 5V and VEE =
−5V.
Note 4: All currents into device pins shown as positive, out of device pins as negative, all voltages referenced to ground unless otherwise noted. All values shown
as max or min on absolute value basis.
Note 5: Only one output at a time should be shorted.
Note 6: A parameter which is of primary concern when designing with line receivers is, what is the minimum differential input voltage required as the receiver input
terminals to guarantee a given output logic state. This parameter is commonly referred to as threshold voltage. It is well known that design considerations of threshold
voltage are plagued by input offset currents, bias currents, network source resistances, and voltage gain. As a design convenience, the DS3650 is specified to a pa-
rameter called input sensitivity (VIS). This parameter takes into consideration input offset currents and bias currents and guarantees a minimum input differential volt-
age to cause a given output logic state with respect to a maximum source impedance of 200
Ω at each input.
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