TLC5620C, TLC5620I

QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS

SLAS081E – NOVEMBER 1994 – REVISED NOVEMBER 2001

6

POST OFFICE BOX 655303

equivalent inputs and outputs

GND

Vref

Input

VDD

To DAC

Resistor

String

_

+

VDD

DAC

Voltage Output

ISINK

60

µA

Typical

84 k

Ω

84 k

Ω

× 1

× 2

Output

Range

Select

Input from

Decoded DAC

Register String

INPUT CIRCUIT

OUTPUT CIRCUIT

GND

7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Digital input voltage range

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

0

°C to 70°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TLC5620I

– 40

°C to 85°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

– 50

°C to 150°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds

260

°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

recommended operating conditions

MIN

NOM

MAX

UNIT

Supply voltage, VDD

4.75

5.25

V

High-level input voltage, VIH

0.8 VDD

V

Low-level input voltage, VIL

0.8

V

Reference voltage, Vref [A|B|C|D]

VDD – 1.5

V

Analog full-scale output voltage, RL = 10 kΩ

3.5

V

Load resistance, RL

10

k

Ω

Setup time, data input, tsu(DATA-CLK) (see Figures 1 and 2)

50

ns

Valid time, data input valid after CLK

↓, tv(DATA-CLK) (see Figures 1 and 2)

50

ns

Setup time, CLK eleventh falling edge to LOAD, tsu(CLK-LOAD) (see Figure 1)

50

ns

Setup time, LOAD

↑ to CLK↓, tsu(LOAD-CLK) (see Figure 1)

50

ns

Pulse duration, LOAD, tw(LOAD) (see Figure 1)

250

ns

Pulse duration, LDAC, tw(LDAC) (see Figure 2)

250

ns

Setup time, LOAD

↑ to LDAC↓,tsu(LOAD-LDAC) (see Figure 2)

0

ns

CLK frequency

1

MHz

Operating free air temperature TA

TLC5620C

0

70

°C

Operating free-air temperature, TA

TLC5620I

– 40

85

°C