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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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LP8725TLE-A/NOPB 데이터시트(PDF) 21 Page - Texas Instruments |
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LP8725TLE-A/NOPB 데이터시트(HTML) 21 Page - Texas Instruments |
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21 / 46 page  LP8725 www.ti.com SNVS618G – DECEMBER 2009 – REVISED MAY 2013 CURRENT CONSUMPTION Unless otherwise noted, VIN1=VIN2=VIN3=VINB1=VINB2=VINLILO1=VINLILO2=3.6V; CLDOX=1µF; CBUCKOUT=CBUCKIN=4.7 µF; CVIN1–3=CVINLILO1=CVINLILO2=2.2 µF. Typical values and limits appearing in normal type apply for TJ=25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, TJ= -40 to +125°C. (1) Symbol Parameter Conditions Min Typ Max Unit IQ(STANDBY) Standby Current All outputs disabled EN = 0 3.3 8 IQ(SLEEP) Current in SLEEP Mode at Outputs disabled via control registers 50 80 no load Only Buck1 and LDO1 enabled 95 All outputs enabled 205 280 µA IQ(IDLE) Current at no load Outputs disabled via control registers 145 210 Only Buck1 and LDO1 enabled 205 All outputs enabled 420 600 (1) Min and Max limits are specified by design, test or statistical analysis. Typical numbers are not verified, but do represent the most likely norm. THERMAL SHUTDOWN The Thermal Shutdown (TSD) function monitors the chip temperature (TJ) to protect the chip from temperature damage caused, e.g., by excessive power dissipation. (1) Symbol Parameter Conditions Min Typ Max Unit TSD 160 °C TSD Hysteresis 20 °C (1) Min and Max limits are specified by design, test or statistical analysis. Typical numbers are not verified, but do represent the most likely norm. UNDER-VOLTAGE LOCK OUT This device has Under-Voltage Lock Out (UVLO) that checks VIN1-pin voltage before starting Power On sequence. UVLO is also checked during Power On sequence. If the VDD voltage is less than UVLO threshold the PMU will not Power On. After the PMU successfully passed Power On sequence UVLO is not monitored. (1) Symbol Parameter Conditions Min Typ Max Unit CONFIG = 0 2.3 UVLO Threshold V VIN1 rising CONFIG = 1 2.825 3.0 3.185 VUVLO CONFIG = 0 400 Hysteresis mV CONFIG = 1 800 (1) Min and Max limits are specified by design, test or statistical analysis. Typical numbers are not verified, but do represent the most likely norm. LOGIC AND CONTROL Unless otherwise noted, VIN1=VIN2=VIN3=VINB1 =VINB2=VINLILO1=VINLILO2=3.6V; CLODX=1µF; CBUCKOUT=CBUCKIN=4.7 µF, CVIN1–3=CVINLILO1CVINLILO2=2.2 µF. Typical values and limits appearing in normal type apply for TJ=25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, TJ= -40 to +125°C. (1) Symbol Parameter Conditions Min Typ Max Unit Logic and Control Inputs VIL Input Low Level EN, SCL, SDA, DVS, PS_HOLD, 0.4 V PWR_ON BUCK2_EN, LDO3_EN VIH Input High Level EN, SCL, SDA, DVS, PS_HOLD 1.2 V PWR_ON, BUCK2_EN, LDO3_EN IIL Input Low Level Current EN, SCL, SDA, DVS, PS_HOLD PWR_ON, DVS, DEFSEL, CONFIG, 0 2 µA BUCK2_EN, LDO3_EN VIL = 0V (1) Min and Max limits are specified by design, test or statistical analysis. Typical numbers are not verified, but do represent the most likely norm. Copyright © 2009–2013, Texas Instruments Incorporated Submit Documentation Feedback 21 Product Folder Links: LP8725 |
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