4

ATFS05/10/40

3017C–FPSLI–07/02

FPSLIC Master Serial

Mode Summary

The I/O and logic functions of the FPSLIC devices are established by a configuration

program. The program is loaded either automatically upon power-up, or on command,

depending on the state of the mode pins. In Master Mode, the FPSLIC automatically

loads the configuration program from an external memory. The FPSLIC Support Device

has been designed for compatibility with the Master Mode.

Control of

Configuration

Most connections between the FPSLIC device and the FPSLIC Support Device are sim-

ple and self-explanatory:

•

The DATA output of the FPSLIC Support Device drives DIN of the FPSLIC devices.

•

The master FPSLIC CCLK output drives the CLK input of the FPSLIC Support

Device.

•

SER_EN must be connected to V

Programming Mode

The programming mode is entered by bringing SER_EN Low. In this mode the chip can

be programmed by the 2-wire serial bus. The programming is done at V

Programming super voltages are generated inside the chip.

Standby Mode

The FPSLIC Support Device enters a low-power standby mode whenever CE is

asserted High. In this mode, the ATFS05 consumes less than 50 µA of current at 3.3V.

The output remains in a high-impedance state regardless of the state of the OE input.