THS4271

THS4275

SLOS397E − JULY 2002 − REVISED JANUARY 2004

www.ti.com

2

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted(1)

UNIT

16.5 V

100 mA

Continuous power dissipation

See Dissipation Rating Table

150

°C

Maximum junction temperature, continuous

125

°C

−65

°C to 150°C

Lead temperature

1,6 mm (1/16 inch) from case for 10 seconds

300

°C

HBM

3000 V

ESD ratings:

CDM

1500 V

ESD ratings:

MM

1000 V

limited by the constraints of the silicon process. Stresses above

these ratings may cause permanent damage. Exposure to

absolute maximum conditions for extended periods may degrade

device reliability. These are stress ratings only, and functional

operation of the device at these or any other conditions beyond

those specified is not implied.

limited by package constraints. Operation above this temperature

may result in reduced reliability and/or lifetime of the device.

This integrated circuit can be damaged by ESD. Texas

Instruments recommends that all integrated circuits be

handled with appropriate precautions. Failure to observe

proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to

complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could

cause the device not to meet its published specifications.

PACKAGE DISSIPATION RATINGS

PACKAGE

θJC

θJA(1)

POWER RATING(2)

PACKAGE

θJC

(

°C/W)

θJA(1)

(

°C/W)

TA ≤ 25°C

TA = 85°C

D (8 pin)

38.3

97.5

1.02 W

410 mW

DGN (8 pin)(3)

4.7

58.4

1.71 W

685 mW

DGK (8 pin)

54.2

260

385 mW

154 mW

DRB (8 pin)(3)

5

45.8

2.18 W

873 mW

(1) This data was taken using the JEDEC standard High-K test PCB.

(2) Power rating is determined with a junction temperature of 125°C.

This is the point where distortion starts to substantially increase.

Thermal management of the final PCB should strive to keep the

junction temperature at or below 125

°C for best performance and

long term reliability.

 on the underside

of the chip. This acts as a heat sink and must be connected to a

thermally dissipative plane for proper power dissipation. Failure

to do so may result in exceeding the maximum junction

temperature which could permanently damage the device. See TI

technical briefs SLMA002 and SLMA004 for more information

about utilizing the PowerPAD thermally enhanced package.

RECOMMENDED OPERATING CONDITIONS

MIN

MAX

UNIT

Supply voltage, (VS+ and VS−)

Dual supply

±2.5

±7.5

V

Supply voltage, (VS+ and VS−)

Single supply

5

15

V

Input common-mode voltage range

VS− + 1.4

VS+ − 1.4

V

PACKAGING/ORDERING INFORMATION

ORDERABLE PACKAGE AND NUMBER

PLASTIC

SMALL OUTLINE

LEADLESS MSOP 8 (2)

PLASTIC MSOP (1)

PowerPAD

PLASTIC MSOP (1)

SMALL OUTLINE

(D) (1)

(DRB)

(DGN)

PACKAGE

MARKING

(DGK)

PACKAGE

MARKING

THS4271D

THS4271DRBT

THS4271DGN

BFQ

THS4271DGK

BEY

THS4271DR

THS4271DRBR

THS4271DGNR

BFQ

THS4271DGKR

BEY

THS4275D

THS4275DRBT

THS4275DGN

BFR

THS4275DGK

BJD

THS4275DR

THS4275DRBR

THS4275DGNR

BFR

THS4275DGKR

BJD

(1) All packages are available taped and reeled. The R suffix standard quantity is 2500 (e.g., THS4271DGNR).

(2) All packages are available taped and reeled. The R suffix standard quantity is 3000. The T suffix standard quantity is 250 (e.g., THS4271DRBT).