| 전자부품 데이터시트 검색엔진 |
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LM93 데이터시트(PDF) 77 Page - National Semiconductor (TI) |
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LM93 데이터시트(HTML) 77 Page - National Semiconductor (TI) |
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77 / 92 page ![]() 16.0 Registers (Continued) 16.8.23 Register E0h Special Function TACH to PWM Binding Register Address Read/ Write Register Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default Value E0h R/W Special Function TACH to PWM Binding T4P2 T4P1 T3P2 T3P1 T2P2 T2P1 T1P2 T1P1 00h Bit Name R/W Description 0 T1P1 R/W If set, TACH1 is bound to PWM1. 1 T1P2 R/W If set, TACH1 is bound to PWM2. 2 T2P1 R/W If set, TACH2 is bound to PWM1. 3 T2P2 R/W If set, TACH2 is bound to PWM2. 4 T3P1 R/W If set, TACH3 is bound to PWM1. 5 T3P2 R/W If set, TACH3 is bound to PWM2. 6 T4P1 R/W If set, TACH4 is bound to PWM1. 7 T4P2 R/W If set, TACH4 is bound to PWM2. If a TACH channel is bound to a PWM channel, TACH errors on that channel are automatically masked when the bound PWM is at 0% duty cycle or performing spin-up. Behavior is undefined if a TACH channel is bound to both PWM outputs. This register must be setup when Smart Tach Mode is enabled in register BDh, Special Function Control 2. www.national.com 77 |
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