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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MCP19116-E/MJ 데이터시트(PDF) 10 Page - Microchip Technology |
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MCP19116-E/MJ 데이터시트(HTML) 10 Page - Microchip Technology |
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10 / 246 page  FIGURE 1-1: MCP19116/7 FLYBACK SYNCHRONOUS QUASI-RESONANT BLOCK DIAGRAM VIN VDR VDD (5V) BGAP UVLO VREF OV REF 8 8 OV BGAP PIC CORE OSC OV UVLO PDRV ISN Icomp A = 10 IP LEB 2 EA_SC PWM Comp PWM Logic DESATN QRS VDR AGND MCLR DIMI SDA TEMP VS BIN I/O x 3 (x7 MCP19117) OV OC Clamp 6 ccd SDRV 4 4 EN1 EN2 OVLO 4 IFB PGND PGND PGND VDD VREF2 MUX to GPB1 I/O LDO1 LDO2 Bias Gen AVDD (4V) AVDD VDD VREF2 8 DESAT MUX 4V to 20V 8.8V to 44V EN BGAP DESATP/ ISOUT ISP VDD_OK RFB MUX BG 5K Gate Drive Timing Gate Drive Timing IP_COMP A2 A1 OV_REF VREF2 VREF A2 OVLO_REF UVLO_REF Lin Interrupt and Logic to PWM & PIC Lin Lin RFB_INT 5V to 10V 4 msb Log Lin Slope Comp ADJ Offset + - - + OVLO PWM VZC VZC VZC VZC VDR UVLO BGAP 2.7V or 5.4V ADC 4 msb 2 lsb 2 lsb BGAP BGAP See elec specs for clamp voltages VIN PDRV IP SDRV DESATN DESATP ISN ISP GPIO GPIO AGND PGND VDD VDD VDD VDR IFB Icomp 4.5V to 42V 4.7 µF 4.7 µF 10 Place recommended VDD and VDR 4.7 µF Capacitors as close to respective pins as possible VDD or AVDD REF |
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