전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

MCP23017-E/ML 데이터시트(PDF) 19 Page - Microchip Technology

부품명 MCP23017-E/ML
상세설명  16-Bit I/O Expander with Serial Interface
PDF  42 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP23017-E/ML 데이터시트(HTML) 19 Page - Microchip Technology

Back Button MCP23017-E/ML Datasheet HTML 15Page - Microchip Technology MCP23017-E/ML Datasheet HTML 16Page - Microchip Technology MCP23017-E/ML Datasheet HTML 17Page - Microchip Technology MCP23017-E/ML Datasheet HTML 18Page - Microchip Technology MCP23017-E/ML Datasheet HTML 19Page - Microchip Technology MCP23017-E/ML Datasheet HTML 20Page - Microchip Technology MCP23017-E/ML Datasheet HTML 21Page - Microchip Technology MCP23017-E/ML Datasheet HTML 22Page - Microchip Technology MCP23017-E/ML Datasheet HTML 23Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 19 / 42 page
background image
 2005-2016 Microchip Technology Inc.
DS20001952C-page 19
MCP23017/MCP23S17
3.5.3
INTERRUPT-ON-CHANGE
CONTROL REGISTER
The
GPINTEN
register
controls
the
interrupt-on-change feature for each pin.
If a bit is set, the corresponding pin is enabled for
interrupt-on-change.
The
DEFVAL
and
INTCON
registers must also be configured if any pins are
enabled for interrupt-on-change.
3.5.4
DEFAULT COMPARE REGISTER
FOR INTERRUPT-ON-CHANGE
The default comparison value is configured in the
DEFVAL register. If enabled (via GPINTEN and
INTCON) to compare against the DEFVAL register, an
opposite value on the associated pin will cause an
interrupt to occur.
REGISTER 3-3:
GPINTEN: INTERRUPT-ON-CHANGE PINS (ADDR 0x02) (Note 1)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
GPINT7
GPINT6
GPINT5
GPINT4
GPINT3
GPINT2
GPINT1
GPINT0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
GPINT<7:0>: General purpose I/O interrupt-on-change bits <7:0>
1
= Enables GPIO input pin for interrupt-on-change event.
0
= Disables GPIO input pin for interrupt-on-change event.
Note 1:
Refer to INTCON.
REGISTER 3-4:
DEFVAL: DEFAULT VALUE REGISTER (ADDR 0x03)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
DEF7
DEF6
DEF5
DEF4
DEF3
DEF2
DEF1
DEF0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
DEF<7:0>: Sets the compare value for pins configured for interrupt-on-change from defaults <7:0>
(Note 1)
If the associated pin level is the opposite from the register bit, an interrupt occurs. (Note 2)
Note 1:
Refer to INTCON.
2:
Refer to INTCON and GPINTEN.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com