MCP23017-ESLASHSS datasheet(21/42 Pages) MICROCHIP

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 2005-2016 Microchip Technology Inc.

DS20001952C-page 21

MCP23017/MCP23S17

The Open-Drain (ODR) control bit enables/disables the

INT pin for open-drain configuration. Setting this bit

overrides the INTPOL bit.

The Interrupt Polarity (INTPOL) sets the polarity of the

INT pin. This bit is functional only when the ODR bit is

cleared, configuring the INT pin as active push-pull.

IOCON: I/O EXPANDER CONFIGURATION REGISTER (ADDR 0x05)

R/W-0

U-0

BANK

MIRROR

SEQOP

DISSLW

HAEN

ODR

INTPOL

—

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

BANK: Controls how the registers are addressed

= The registers associated with each port are separated into different banks.

= The registers are in the same bank (addresses are sequential).

bit 6

MIRROR: INT Pins Mirror bit

= The INT pins are internally connected

= The INT pins are not connected. INTA is associated with PORTA and INTB is associated with

PORTB

bit 5

SEQOP: Sequential Operation mode bit

= Sequential operation disabled, address pointer does not increment.

= Sequential operation enabled, address pointer increments.

bit 4

DISSLW: Slew Rate control bit for SDA output

= Slew rate disabled

= Slew rate enabled

bit 3

HAEN: Hardware Address Enable bit (MCP23S17 only) (Note 1)

= Enables the MCP23S17 address pins.

= Disables the MCP23S17 address pins.

bit 2

ODR: Configures the INT pin as an open-drain output

= Open-drain output (overrides the INTPOL bit.)

= Active driver output (INTPOL bit sets the polarity.)

bit 1

INTPOL: This bit sets the polarity of the INT output pin

= Active-high

=Active-low

bit 0

Unimplemented: Read as ‘0’

Note 1:

Address pins are always enabled on the MCP23017.

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