MCP2221 datasheet(33/80 Pages) MICROCHIP

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 2015 Microchip Technology Inc.

DS20005292B-page 33

MCP2221

TABLE 3-12:

SUB-COMMAND STRUCTURE – WRITE CHIP SETTINGS SUB-COMMAND

Byte

Index

Function Description

Value

Effect

0xB1

Write Flash Data – command code

0x00

Write Chip Settings – it will write the MCP2221 flash device

settings

Bit 7: CDC Serial Number

Enumeration Enable.

The USB serial number will be used during the USB enumeration

of the CDC interface.

No serial number descriptor will be presented during the USB

enumeration.

Bit 6: Initial value for

LEDUARTRX pin option

This value represents the logic level signaled when no UART RX

activity takes places. When the UART RX (of the MCP2221) is

receiving data, the LEDUARTRX pin will take the negated value

of this bit.

Bit 5: Initial value for

LEDUARTTX pin option

This value represents the logic level signaled when no UART TX

transmission takes place. When the UART TX (of the MCP2221)

is sending data, the LEDUARTTX pin will take the negated value

of this bit.

Bit 4: Initial value for LEDI2C pin

option

This value represents the logic level signaled when no I2C traffic

occurs. When I2C traffic is active, the LEDI2C pin (if enabled) will

take the negated value of this bit.

Bit 3: Initial value for SSPND pin

option

This value represents the logic level signaled when the device is

not in Suspend mode. Upon entering Suspend mode, the

SSPND pin (if enabled) will take the negated value of this bit.

Bit 2: Initial value for USBCFG

pin option

This value represents the logic level signaled when the device is

not USB configured. When the device will be USB-configured,

the USBCFG pin (if enabled) will take the negated value of this

bit.

Bit 1-0: Chip Configuration

Security Option

11-10

Permanently locked

Password-protected

Unsecured

3Bit 7-5

Don’t

care

Bit 4-0: Clock Output divider

value

If the GP pin (exposing the clock output) is enabled for clock

output operation, the divider value will be used on the 48 MHz

USB internal clock and its divided output will be sent to this pin.

Bit 7-6: DAC Reference voltage

option

Reference voltage is 4.096V (only if VDD is above this voltage)

Reference voltage is 2.048V

Reference voltage is 1.024V

Reference voltage is off (this is useful for the case in which the

DAC uses other reference than VRM DAC, i.e., VDD)

Bit 5: DAC reference option

DAC reference is VDD

DAC reference is VRM DAC voltage

Bit 4-0: Power-Up DAC value

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