MCP1253-ADJESLASHMS datasheet(9/20 Pages) MICROCHIP

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 2002-2014 Microchip Technology Inc.

DS20001752C-page 9

MCP1252/3

4.0

DEVICE OVERVIEW

4.1

Theory of Operation

The MCP1252 and MCP1253 family of devices employ

a switched capacitor charge pump to buck or boost an

input supply voltage (VIN) to a regulated output voltage.

Referring to the Functional Block Diagram and

Figure 4-1, the devices perform conversion and

regulation in three phases. When the devices are not in

shutdown mode and a steady-state condition has been

reached, the three phases are continuously cycled

through. The first phase transfers charge from the input

to the flying capacitor (CFLY) connected to pins C+ and

C-. This phase always occurs for half of the internal

oscillator period. During this phase, switches S1 and S2

are closed.

Once the first phase is complete, all switches are

opened and the second phase (idle phase) is entered.

The device compares the internal or external feedback

voltage with an internal reference. If the feedback volt-

age is below the regulation point, the device transitions

to the third phase.

The third phase transfers energy from the flying capac-

itor to the output capacitor connected to VOUT and the

load. If regulation is maintained, the device returns to

the idle phase. If the charge transfer occurs for half the

internal oscillator period, more charge is needed in the

flying capacitor and the device transitions back to the

first phase.

The regulation control is hysteretic, otherwise referred

to as a bang-bang control. The output is regulated

around a fixed reference with some hysteresis. As a

result, typically 50 mV of peak-to-peak ripple will be

observed at the output independent of load current.

The frequency of the output ripple, however, will be

influenced heavily by the load current and output

capacitance. The maximum frequency that will be

observed is equal to the internal oscillator frequency.

The devices automatically transition between buck or

boost operation. This provides a low-cost, compact and

simple

solution

for

step-down/step-up

DC/DC

conversion. This is especially true for battery-operated

applications that require a fixed output above or below

the input.

FIGURE 4-1:

Flow Algorithm.

START

PHASE 1:

Charge Transfer

From VIN to CFLY

PHASE 2:

Idle State

VFB > VREF

PHASE 3:

Charge Transfer

From CFLY to COUT

Yes

VFB > VREF

2FOSC

----------------

2FOSC

----------------

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