MCP102-195ESLASHTO datasheet(14/28 Pages) MICROCHIP

14 / 28 page

MCP102/103/121/131

DS20001906D-page 14

 2004-2014 Microchip Technology Inc.

4.2

Negative Going VDD Transients

The minimum pulse width (time) required to cause a

reset

may

important

criterion

the

implementation of a Power-on Reset (POR) circuit.

This time is referred to as transient duration, defined as

the amount of time needed for these supervisory

devices to respond to a drop in VDD. The transient

duration time is dependent on the magnitude of VTRIP –

VDD. Generally speaking, the transient duration

decreases with increases in VTRIP –VDD.

Figure 4-3 shows a typical transient duration versus

reset

comparator

overdrive,

for

which

the

MCP102/103/121/131 will not generate a reset pulse. It

shows that the farther below the trip point of the

transient pulse goes, the shorter the duration of the

pulse required to cause a reset gets. Figure 2-32

shows the transient response characteristics for the

MCP102/103/121/131.

A 0.1 µF bypass capacitor, mounted as close as

possible to the VDD pin, provides additional transient

immunity (refer to Figure 4-1).

FIGURE 4-3:

Example of Typical

Transient Duration Waveform.

4.3

Reset Power-up Timer (tRPU)

Figure 4-4 illustrates the device’s current states. While

the system is powering down, the device has a low

current. This current is dependent on the device VDD

and trip point. When the device VDD rises through the

voltage trip point (VTRIP), an internal timer starts. This

timer consumes additional current until the RST pin is

driven (or released) high. This time is known as the

Reset Power-up Time (tRPU). Figure 4-4 shows when

tRPU is active (device consuming additional current).

FIGURE 4-4:

Reset Power-up Timer

Waveform.

4.3.1

EFFECT OF TEMPERATURE ON

RESET POWER-UP TIMER (TRPU)

The Reset Power-up timer time-out period (t

RPU)

determines how long the device remains in the reset

condition. This is affected by both VDD and temperature.

Typical responses for different VDD values and

temperatures are shown in Figures 2-26, 2-27 and 2-28.

Time (µs)

VTRIP(MIN) -VDD

tTRANS

VTRIP(MAX)

VTRIP(MIN)

VTRIP

VDD

RST

tRPU

Reset Power-up

Timer Inactive

Reset

Power-up

Timer

Inactive

See Figures 2-1,

2-2 and 2-3

See Figures 2-4,

2-5 and 2-6

See Figures 2-1,

2-2 and 2-3

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