PCM1802DBR datasheet(14/24 Pages) TI

부품명	PCM1802DBR

상세설명	SINGLE-ENDED ANALOG-INPUT 24-BIT, 96-kHz STEREO A/D CONVERTER

PDF	24 Pages

Scroll/Zoom	100%

제조업체	TI [Texas Instruments]

홈페이지	http://www.ti.com

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14 / 24 page

PCM1802

SLES023B – DECEMBER 2001 – REVISED MARCH 2002

www.ti.com

PRINCIPLES OF OPERATION

power-on reset sequence

The PCM1802 has an internal power-on reset circuit and initialization (reset) is performed automatically when

the power supply (VDD) exceeds 2.2 V (typ). While VDD < 2.2 V (typ), and for 1024 system-clock counts after

VDD > 2.2 V (typ), the PCM1802 stays in the reset state and the digital output is forced to zero. The digital output

is valid after the reset state is released and the time of 4480/fS has passed. Figure 23 illustrates the internal

power-on reset timing and the digital output for power-on reset.

System Clock

2.6 V

2.2 V

1.8 V

Internal Reset

DOUT

Zero Data

Normal Data

Reset

VDD

Reset Removal

1024 System Clocks

4480 / fS

Figure 23. Internal Power-On Reset Timing

serial audio data interface

The PCM1802 interfaces with the audio system through BCK (pin 11), LRCK (pin 10), FSYNC (pin 9), and DOUT

(pin 12).

PCM1802DBR 데이터시트(PDF) 14 Page - Texas Instruments