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SN74LVC1G57DBVR 데이터시트(PDF) 3 Page - Texas Instruments |
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SN74LVC1G57DBVR 데이터시트(HTML) 3 Page - Texas Instruments |
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3 / 14 page ![]() SN74LVC1G57 CONFIGURABLE MULTIPLEFUNCTION GATE SCES414G − NOVEMBER 2002 − REVISED SEPTEMBER 2003 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 FUNCTION SELECTION TABLE LOGIC FUNCTION FIGURE NO. 2-input AND 1 2-input AND with both inputs inverted 4 2-input NAND with inverted input 2, 3 2-input OR with inverted input 2, 3 2-input NOR 4 2-input NOR with both inputs inverted 1 2-input XNOR 5 logic configurations A Y B 1 2 3 6 5 4 A Y B VCC A Y B Figure 1. 2-Input AND Gate A Y B 1 2 3 6 5 4 A Y B VCC A Y B Figure 2. 2-Input NAND Gate With Inverted A Input A Y B 1 2 3 6 5 4 A Y B VCC A Y B Figure 3. 2-Input NAND Gate With Inverted B Input A Y B 1 2 3 6 5 4 A Y B VCC A Y B Figure 4. 2-Input NOR Gate 1 2 3 6 5 4 A Y B VCC Y Figure 5. 2-Input XNOR Gate A B |
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