DAC7513

12

SBAS157A

www.ti.com

EXITING POWER-DOWN

(800

Time (5

µs/div)

CLK (2.7V/div)

V

CODE CHANGE GLITCH

Time (0.5

µs/div)

Loaded with 2k

Ω

and 200pF to GND.

Code Change:

800

THEORY OF OPERATION

DAC SECTION

The architecture consists of a string DAC followed by an

output buffer amplifier. Figure 1 shows a block diagram of the

DAC architecture.

The input coding to the DAC7513 is straight binary, so the

ideal output voltage is given by:

VV

D

OUT

REF

=

•

4096

where D = decimal equivalent of the binary code that is

loaded to the DAC register; it can range from 0 to 4095.

RESISTOR STRING

The resistor string shown in Figure 2 is simply a string of

resistors, each of value R. The code loaded into the DAC

register determines at which node on the string the voltage

is tapped off to be fed into the output amplifier by closing one

of the switches connecting the string to the amplifier. It is

ensured monotonic because it is a string of resistors.

FIGURE 1. DAC7513 Architecture.

DAC Register

REF (+)

Resistor String

REF (–)

Output

Amplifier

GND

V

DD

V

OUT

V

FB

OUTPUT AMPLIFIER

The output buffer amplifier is capable of generating rail-to-rail

voltages on its output which gives an output range of

1000pF to GND. The source and sink capabilities of the output

amplifier can be seen in the typical characteristics. The slew

rate is 1V/

µs with a half-scale settling time of 8µs with the output

unloaded.

FIGURE 2. Resistor String.

To Output

Amplifier

R

R

R

R

R

(1)