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DS1922L 데이터시트(PDF) 13 Page - Dallas Semiconductor |
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DS1922L 데이터시트(HTML) 13 Page - Dallas Semiconductor |
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13 / 48 page ![]() DS1922L/DS1922T 13 of 48 Figure 2. Hierachical Structure for 1-Wire Protocol 1-Wire net Other Devices BUS Master DS1922L, DS1922T Available Commands: Command Level: Data Field Affected: 1-Wire ROM Function Commands DS1922-Specific Memory Function Commands Read ROM Match ROM Search ROM Conditional Search ROM Skip ROM Resume Overdrive Skip Overdrive Match 64-bit ROM, RC-Flag 64-bit ROM, RC-Flag 64-bit ROM, RC-Flag 64-bit ROM, RC-Flag, Alarm Flags, Search Conditions RC-Flag RC-Flag RC-Flag, OD-Flag 64-bit ROM, RC-Flag, OD-Flag Write Scratchpad Read Scratchpad Copy Scratchpad w/PW Read Memory w/PW & w/CRC Clear Memory w/PW Forced Conversion Start Mission w/PW Stop Mission w/PW 256-bit Scratchpad, Flags 256-bit Scratchpad 512 byte Data Memory, Registers, Flags, Passwords Memory, Registers, Passwords Mission Time Stamp, Mission Samples Counter, Start Delay, Alarm Flags, Passwords Memory addresses 020Ch to 020Dh Flags, Timestamp, Memory addresses 020Ch to 020Dh (when logging) Flags Figure 3. 64-Bit Lasered ROM MSB LSB 8-Bit CRC Code 48-Bit Serial Number 8-Bit Family Code (41h) MSB LSB MSB LSB MSB LSB Figure 4. 1-Wire CRC Generator X 0 X 1 X 2 X 3 X 4 X 5 X 6 X 7 X 8 Polynomial = X 8 + X5 + X4 + 1 1 st STAGE 2 nd STAGE 3 rd STAGE 4 th STAGE 6 th STAGE 5 th STAGE 7 th STAGE 8 th STAGE INPUT DATA |
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