2.4 R0 REGISTER

The R0 register contains the RF_R, RF_CPP, RF_CPG, RF_CPT, and RF_RST control words, in addition to two of the four bits

that compose the MUX control word. The detailed descriptions and programming information for each control word is discussed

in the following sections.

Reg

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9876543210

DATA[20:0] FIELD

ADDRESS

[2:0]

FIELD

R0

MUX[3:2]

RF_

RST

RF_

CPT

RF_

CPG

RF_

CPP

RF_R[14:0]

0

0

0

2.4.1 RF_R[14:0] - RF Synthesizer Programmable Reference Divider (R Counter) (R0[17:3])

The RF reference divider (RF_R) can be programmed to support divide ratios from 3 to 32767. Divide ratios less than 3 are

prohibited.

Divide Ratio

RF_R[14:0]

14

13

12

11

10

987654321

0

3

00000000000001

1

4

00000000000010

0

•

••••••••••••••

•

32767

11111111111111

1

2.4.2 RF_CPP - RF Synthesizer Phase Detector Polarity (R0[18])

The RF_CPP bit is used to control the RF synthesizer’s phase/ frequency detector polarity based on the VCO tuning

characteristics.

Control Bit

Register Location

Description

Function

01

RF_CPP

R0[18]

RF Phase/

Frequency Detector

Polarity

RF VCO Negative

Tuning

Characteristics

RF VCO Positive

Tuning

Characteristics

RF VCO Characteristics

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