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AL5802LP4 데이터시트(PDF) 4 Page - Diodes Incorporated

부품명 AL5802LP4
상세설명  30V, ADJUSTABLE CURRENT SINK LINEAR LED DRIVER
PDF  10 Pages
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제조업체  DIODES [Diodes Incorporated]
홈페이지  http://www.diodes.com
Logo DIODES - Diodes Incorporated

AL5802LP4 데이터시트(HTML) 4 Page - Diodes Incorporated

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AL5802LP4
Document number: DS37441 Rev. 4 - 2
4 of 10
www.diodes.com
February 2016
© Diodes Incorporated
AL5802LP4
Electrical Characteristics: NPN Transistor
– Q1 (@T
A = +25°C, unless otherwise specified.)
Symbol
Characteristic
Test Condition
Min
Typ
Max
Unit
V(BR)CEO
Collector-Emitter Breakdown Voltage (Note 6) (Note 7)
IC = 1.0mA, IB = 0
40
—
—
V
V(BR)EBO
Emitter-Base Breakdown Voltage
IE = 10µA, IC = 0
6.0
—
—
V
ICEX
Collector Cutoff Current (Note 7)
VCE = 30V, VEB(OFF) = 3.0V
—
—
50
nA
IBL
Base Cutoff Current (Note 7)
VCE = 30V, VEB(OFF) = 3.0V
—
—
50
nA
hFE
DC Current Gain
IC = 1.0mA, VCE = 1.0V
IC = 10mA, VCE = 1.0V
70
100
—
—
—
300
—
VCE(SAT)
Collector-Emitter Saturation Voltage (Note 6)
IC = 10mA, IB = 1.0mA
—
—
0.20
V
VBE(SAT)
Base-Emitter Saturation Voltage
IC = 10mA, IB = 1.0mA
0.65
—
0.85
V
VBE(ON)
Base-Emitter Turn-On Voltage
VCE = 1.20V, IC = 2.0mA
0.30
1.10
V
Electrical Characteristics: NPN Pre-biased Transistor
– Q2 (@T
A = +25°C, unless otherwise specified.)
Symbol
Characteristic
Test Condition
Min
Typ
Max
Unit
V(BR)CBO
Collector-Base Breakdown Voltage
IC = 50μA, IE = 0
30
—
—
V
V(BR)CEO
Collector-Emitter Breakdown Voltage (Note 6)
IC = 1mA, IB = 0
30
—
—
V
V(BR)EBO
Emitter-Base Breakdown Voltage (Note 7)
IE = 50μA, IC = 0
5.0
—
—
V
ICBO
Collector Cutoff Current
VCB = 30V, IE = 0
—
—
0.5
µA
IEBO
Emitter Cutoff Current (Note 7)
VEB = 4V, IC = 0
—
—
0.5
µA
VCE(SAT)
Collector-Emitter Saturation Voltage (Note 6)
IC = 10mA, IB = 1mA
—
—
0.3
V
VBE(ON)
Base-Emitter Turn-On Voltage
VCE = 5.0V, IC = 2.0mA
0.30
1.10
V
hFE
DC Current Gain (Note 6)
VCE = 5V, IC = 150mA
100
—
—
—
R1
Input Resistance
—
7
10
13
kΩ
*Characteristics of transistor only.
Notes:
6. Short duration pulse test used to minimize self-heating effect.
7. Guaranteed by design and tested only at the wafer level for single die. These parameters cannot be tested at the finished good level due to test
conditions changed after packaging multi-dies to form an application circuit.



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