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ST72561R9 데이터시트(PDF) 37 Page - STMicroelectronics

부품명 ST72561R9
상세설명  8-BIT MCU WITH FLASH OR ROM, 10-BIT ADC, 5 TIMERS, SPI, LINSCI , ACTIVE CAN
PDF  262 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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ST72561R9 데이터시트(HTML) 37 Page - STMicroelectronics

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INTERRUPTS (Cont’d)
7.6.2 Register Description
EXTERNAL INTERRUPT CONTROL
REGISTER 0 (EICR0)
Read /Write
Reset Value: 0000 0000 (00h)
Bit 7:6 = IS3[1:0] ei3 sensitivity
The interrupt sensitivity, defined using the IS3[1:0]
bits, is applied to the ei3 external interrupts:
These 2 bits can be written only when I1 and I0 of
the CC register are both set to 1 (level 3).
Bit 5:4 = IS2[1:0] ei2 sensitivity
The interrupt sensitivity, defined using the IS2[1:0]
bits, is applied to the ei2 external interrupts:
These 2 bits can be written only when I1 and I0 of
the CC register are both set to 1 (level 3).
Bit 3:2 = IS1[1:0] ei1 sensitivity
The interrupt sensitivity, defined using the IS1[1:0]
bits, is applied to the ei1 external interrupts:
These 2 bits can be written only when I1 and I0 of
the CC register are both set to 1 (level 3).
Bit 1:0 = IS0[1:0] ei0 sensitivity
The interrupt sensitivity, defined using the IS0[1:0]
bits, is applied to the ei0 external interrupts:
These 2 bits can be written only when I1 and I0 of
the CC register are both set to 1 (level 3).
EXTERNAL INTERUPT CONTROL REGISTER 1
(EICR1)
Read /Write
Reset Value: 0000 0000 (00h)
BIt 7:2 = Reserved
Bit 1 = TLIS Top Level Interrupt sensitivity
This bit configures the TLI edge sensitivity. It can
be set and cleared by software only when TLIE bit
is cleared.
0: Falling edge
1: Rising edge
Bit 0 = TLIE Top Level Interrupt enable
This bit allows to enable or disable the TLI capabil-
ity on the dedicated pin. It is set and cleared by
software.
0: TLI disabled
1: TLI enabled
Notes:
– A parasitic interrupt can be generated when
clearing the TLIE bit.
– In some packages, the TLI pin is not available. In
this case, the TLIE bit must be kept low to avoid
parasitic TLI interrupts.
70
IS31
IS30
IS21
IS20
IS11
IS10
IS01
IS00
IS31 IS30
External Interrupt Sensitivity
0
0
Falling edge & low level
0
1
Rising edge only
1
0
Falling edge only
1
1
Rising and falling edge
IS21 IS20
External Interrupt Sensitivity
0
0
Falling edge & low level
0
1
Rising edge only
1
0
Falling edge only
1
1
Rising and falling edge
IS11 IS10
External Interrupt Sensitivity
0
0
Falling edge & low level
0
1
Rising edge only
1
0
Falling edge only
1
1
Rising and falling edge
IS01 IS00
External Interrupt Sensitivity
0
0
Falling edge & low level
0
1
Rising edge only
1
0
Falling edge only
1
1
Rising and falling edge
70
0000
00
TLIS
TLIE



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