PESDXUSB3S_SER

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© NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet

Rev. 3 — 26 April 2016

13 of 19

NXP Semiconductors

PESDxUSB3S series

ESD protection for differential data lines

Fig 17. Package outline WLCSP15

References

Outline

version

European

projection

Issue date

IEC

JEDEC

JEITA

PESD3USB3S

pesd3usb3s_po

Unit

mm

max

nom

min

0.60

0.38

2.42

1.22

0.80

A

Dimensions (mm are the original dimensions)

WLCSP15: wafer level chip-size package; 15 bumps (6-3-6)

PESD3USB3S

b

0.31

DE

e

0.80

0.57

0.37

2.37

1.17

0.40

0.40

0.26

0.54

0.36

2.32

1.12

0.21

0

1 mm

scale

detail X

A

D

E

bump A1

index area

bump A1

index area

X

e

b

12

4

36

5

A

B

C

1/2 e

B1

B2

B3

15-12-11