LO

CIT

M

VITESSE

SEMICONDUCTOR CORPORATION

Data Sheet

VSC7123

10-Bit Transceiver for Fibre

Channel and Gigabit Ethernet

Page 8

G52212-0, Rev 4.3

03/25/01

© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012

Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com

Internet: www.vitesse.com

Figure 6: REFCLK Timing Waveforms

Table 4: Reference Clock Requirements

Parameter

Description

Min

Max

Units

Conditions

FR

Frequency Range

98

136

MHz

Range over which both transmit and

receive reference clocks on any link may

be centered.

FO

Frequency Offset

-200

200

ppm

Maximum frequency offset between

transmit and receive reference clocks on

one link.

DC

REFCLK duty cycle

35

65

%

Measured at 1.5V

REFCLK rise and fall time

—

1.5

ns

REFCLK