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DA7212 데이터시트(PDF) 91 Page - Dialog Semiconductor

부품명 DA7212
상세설명  Ultra-low power stereo codec
PDF  129 Pages
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DA7212
Ultra-low power stereo codec
Company confidential
Datasheet
Revision 3c
24-Nov-2015
91 of 129
© 2015 Dialog Semiconductor
14.6 System controller registers
Register
address
Bit
Type
Label
Default
Description
0x50
SYSTEM_M
ODES_INPU
T
7
R/W
ADC_R
0
Preconfigured system mode - ADC_R Control
0 = ADC_R not used
1 = use ADC R
6
R/W
ADC_L
0
Preconfigured system mode - ADC_L Control
0 = ADC_L not used
1 = use ADC L
5
R/W
MIXIN_R
0
Preconfigured system mode
– IN_R Control
0 = IN R amplifier not used
1 = use IN_R amplifer
4
R/W
MIXIN_L
0
Preconfigured system mode
– IN_L Control
0 = IN L amplifier not used
1 = use IN_L amplifer
3
R/W
MIC_2
0
Preconfigured system mode
– MIC_2 Control
0 = MIC 2 amplifier not used
1 = use MIC 2 amplifier
2
R/W
MIC_1
0
Preconfigured system mode
– MIC_1 Control
0 = MIC 1 amplifier not used
1 = use MIC 1 amplifier
1
R/W
(Reserved)
0
0
R/W
MODE_SUBMIT
0
System Controller 2 activation control
0 = ADC_mode and DAC_mode inactive
1 = ADC_mode and DAC_mode active
This register bit is a duplicate of
MODE_SUBMIT (reg 0x51[0]). Either register
can be used to activate System Controller 2.
This bit is self-clearing.



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