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DA7217 데이터시트(PDF) 91 Page - Dialog Semiconductor

부품명 DA7217
상세설명  Ultra-Low Power Stereo Codec
PDF  171 Pages
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DA7217
Ultra-Low Power Stereo Codec
Datasheet
Revision 2.5
01 Sep 2016
CFR0011-120-00
91 of 171
© 2016 Dialog Semiconductor
Table 107: DAI_CLK_MODE (Page 0: 0x00000090)
Bit
Mode
Symbol
Description
Reset
7
R/W
dai_clk_en
DAI master mode control
0 = Slave mode (BCLK/WCLK inputs)
1 = Master mode (BCLK/WCLK outputs)
0x0
4
R/W
dai_wclk_tri_state
WCLK tri-state control
0 = WCLK state set by the dai_clk_en (WCLK is set
as the output in master mode, and as the input in
slave mode)
1 = WCLK forced as an input
0x0
3
R/W
dai_wclk_pol
DAI word clock polarity control
0 = Normal polarity
1 = Inverted polarity
0x0
2
R/W
dai_clk_pol
DAI bit clock polarity control
0 = Normal polarity
1 = Inverted polarity
0x0
1:0
R/W
dai_bclks_per_wclk
Number of BCLK cycles per WCLK period in DAI
master mode
00 = 32 BCLK cycles per WCLK
01 = 64 BCLK cycles per WCLK
10 = 128 BCLK cycles per WCLK
11 = 256 BCLK cycles per WCLK
0x1



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