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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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UCD3138 데이터시트(PDF) 48 Page - Texas Instruments |
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UCD3138 데이터시트(HTML) 48 Page - Texas Instruments |
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48 / 89 page  48 UCD3138 SLUSAP2G – MARCH 2012 – REVISED SEPTEMBER 2016 www.ti.com Submit Documentation Feedback Product Folder Links: UCD3138 Detailed Description Copyright © 2012–2016, Texas Instruments Incorporated 6.6 Device Functional Modes The DPWM is a complex logic system which is highly configurable to support several different power supply topologies. The discussion below will focus primarily on waveforms, timing and register settings, rather than on logic design. The DPWM is centered on a period counter, which counts up from 0 to PRD, and then is reset and starts over again. The DPWM logic causes transitions in many digital signals when the period counter hits the target value for that signal. 6.6.1 Normal Mode In Normal mode, the Filter output determines the pulse width on DPWM A. DPWM B fits into the rest of the switching period, with a dead time separating it from the DPWM A on-time. It is useful for buck topologies, among others. Here is a drawing of the Normal Mode waveforms: |
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