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DP7172 데이터시트(PDF) 2 Page - Copal Electronics |
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DP7172 데이터시트(HTML) 2 Page - Copal Electronics |
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2 / 11 page ![]() DP7172 2 SPI INTERFACE WIPER REGISTER CLK A B W SDI GND Figure 1. Functional Block Diagram VDD CS Table 1. ORDERING INFORMATION Part Number Resistance Temperature Range Package Shipping DP7172TBI 50-GT3 50 k 40 C to 85 C SOT 23 8 (Pb Free) 3000/Tape & Reel DP7172TBI 00-GT3 100 k 3000/Tape & Reel Table 2. PIN FUNCTION DESCRIPTION Pin No. Pin Name Description 1 W Resistor s Wiper Terminal. 2 VDD Positive Power Supply. 3 GND Digital Ground. 4 CLK Serial Clock Input. Positive edge triggered. 5 SDI Serial Data Input. 6 CS Chip Select Input, Active Low. When CS returns high, data will be loaded into the DAC register. 7 B Bottom Terminal of resistive element. 8 A Top Terminal of resistive element. Table 3. ABSOLUTE MAXIMUM RATINGS (Note 1) Rating Value Unit VDD to GND 0.3 to 6.5 V VA, VB, VW to GND VDD IMAX 20 mA Digital Inputs and Output Voltage to GND 0 to 6.5 V Operating Temperature Range 40 to +85 C Maximum Junction Temperature (TJMAX) 150 C Storage Temperature 65 to +150 C Lead Temperature (Soldering, 10 sec) 300 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Maximum terminal current is bounded by the maximum current handling of the switches, maximum power dissipation of the package, and maximum applied voltage across any two of the A, B, and W terminals at a given resistance. |
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