AR0141CS datasheet(57/64 Pages) ONSEMI

57 / 64 page

AR0141CS/D Rev. 6, 4/16 EN

©Semiconductor Components Industries, LLC, 2016.

AR0141CS: 1/4-Inch Digital Image Sensor

Electrical Specifications

Notes:

1. One UI is defined as the normalized mean time between one edge and the following edge of the

clock.

2. Taken from the 0V crossing point with the DLL off.

3. Also defined with a maximum loading capacitance of 10 pF on any pin. The loading capacitance

may also need to be less for higher bitrates so the rise and fall times do not exceed the maximum

0.3 UI.

4. The absolute mean skew between the Clock lane and any Data Lane in the same PHY between any

edges.

5. The absolute skew between any Clock in one PHY and any Data lane in any other PHY between any

edges.

6. Differential skew is defined as the skew between complementary outputs. It is measured as the

absolute time between the two complementary edges at mean VCM point. Note that differential

skew also is related to the VCM_AC spec, which also must not be exceeded.

Figure 46:

Differential Output Voltage for Clock or Data Pairs

Table 32:

SLVS Electrical Timing Specification

Parameter

Symbol

Min

Max

Unit

Notes

Data Rate

1/UI

280

600

Mbps

Bitrate Period

tPW

1.43

3.57

Max setup time from transmitter

tPRE

0.3

1, 2

Max hold time from transmitter

tPOST

0.3

1, 2

Eye Width

tEYE

0.6

1, 2

Data Total Jitter (pk-pk) @1e-9

tTOTALJIT

0.2

1, 2

Clock Period Jitter (RMS)

tCKJIT

Clock Cycle-to-Cycle Jitter (RMS)

tCYCJIT

100

Rise time (20% - 80%)

150ps

0.25

Fall time (20% - 80%)

150ps

0.25

Clock duty cycle

DCYC

Mean Clock to Data Skew

tCHSKEW

-0.1

0.1

1, 4

PHY-to-PHY Skew

tPHYSKEW

2.1

1, 5

Mean differential skew

tDIFFSKEW

-100

100

0V Diff)

VDIFFmax

VDIFFmin

Output Signal is 'Cp - Cn' or 'Dp - Dn'

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