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LM1237 데이터시트(PDF) 8 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
부품명 LM1237
상세설명  150 MHz I2C Compatible RGB Preamplifier with Internal 254 Character OSD and 4 DACs
PDF  42 Pages
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제조업체  NSC [National Semiconductor (TI)]
홈페이지  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM1237 데이터시트(HTML) 8 Page - National Semiconductor (TI)

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Typical Performance Characteristics V
CC = 5V, TA = 25˚C unless otherwise specified (Continued)
ABL Gain Reduction
The ABL function reduces the contrast level of the LM1237 as the voltage on pin 22 is lowered from V
CC to around 2 volts. Figure
8 shows the amount of gain reduction as the voltage is lowered from V
CC (5.0V) to 2V. The gain reduction is small until V22
reaches the knee anound 3.7V, where the slope increases. Many system designs will require about 3 to 5 dB of gain reduction
in full beam limiting. Additional attenuation is possible, and can be used in special circumstances. However, in this case, video
performance such as video linearity and tracking between channels will tend to depart from normal specifications.
OSD Phase Locked Loop
Table 3 shows the recommended horizontal scan rate ranges (in kHz) for each combination of PLL register setting, 0x843E [1:0],
and the pixels per line register setting, 0x8401 [7:5]. These ranges are recommended for chip ambient temperatures of 50oCto
70oC. While the OSD PLL will lock for other register combinations and at scan rates outside these ranges, the performance of the
loop will be improved if these recommendations are followed. NR means the combination of PLL and PPL is not recommended
for any scan rate.
TABLE 3. OSD Register recommendations
PPL=0
PPL=1
PPL=2
PPL=3
PPL=4
PPL=5
PPL=6
PPL=7
PLL=1
27 - 57
26 - 49
25 - 45
25 - 41
25 - 37
25 - 34
25 - 32
25 - 30
PLL=2
NR
NR
45 - 89
41 - 82
37 - 75
34 - 69
32 - 64
30 - 60
PLL=3
NR
NR
NR
82 - 110
75 - 110
69 - 110
64 - 110
60 - 110
20023460
FIGURE 8. ABL Gain Reduction Curve
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