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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TMS320LC2401AVFS 데이터시트(PDF) 103 Page - Texas Instruments |
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TMS320LC2401AVFS 데이터시트(HTML) 103 Page - Texas Instruments |
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103 / 134 page  TMS320LF2407A,TMS320LF2406A, TMS320LF2403A, TMS320LF2402A TMS320LC2406A, TMS320LC2404A, TMS320LC2403A, TMS320LC2402A DSP CONTROLLERS SPRS145K − JULY 2000 − REVISED AUGUST 2005 103 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 external memory interface ready-on-read timing switching characteristics over recommended operating conditions for an external memory interface ready-on-read (see Figure 47) PARAMETER MIN MAX UNIT td(COL-A)RD Delay time, CLKOUT low to address valid 8 ns timing requirements for an external memory interface ready-on-read (see Figure 47) MIN MAX UNIT th(RDY)COH Hold time, READY after CLKOUT high −3 ns tsu(D)RD Setup time, read data before RD strobe inactive high 8 ns tv(RDY)ARD Valid time, READY after address valid on read −2 ns tsu(RDY)COH Setup time, READY before CLKOUT high 22 ns th(RDY)COH CLKOUT PS, DS, IS RD D[0:15] STRB A[0:15] td(COL−A)RD tv(RDY)ARD tsu(RDY)COH READY† Wait Cycle tsu(D)RD † The WSGR register must be programmed before the READY pin can be used. See the READY pin description for more details. Figure 47. Ready-on-Read Timings |
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