TMS320LC2401AVFS datasheet(107/134 Pages) TI

107 / 134 page

TMS320LF2407A,TMS320LF2406A, TMS320LF2403A, TMS320LF2402A

TMS320LC2406A, TMS320LC2404A, TMS320LC2403A, TMS320LC2402A

DSP CONTROLLERS

SPRS145K − JULY 2000 − REVISED AUGUST 2005

107

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

10-bit analog-to-digital converter (ADC)

The 10-bit ADC has a separate power bus for its analog circuitry. These pins are referred to as VCCA and VSSA.

The power bus isolation is to enhance ADC performance by preventing digital switching noise of the logic

circuitry that can be present on VSS and VCC from coupling into the ADC analog stage. All ADC specifications

are given with respect to VSSA unless otherwise noted.

Resolution

10-bit (1024 values)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Monotonic

Assured

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output conversion mode

000h to 3FFh (000h for VI ≤ VREFLO; 3FFh for VI ≥ VREFHI)

. . . . . . . . . . . . . . . . . . . .

Minimum conversion time (including sample time)

500 ns

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

recommended operating conditions

MIN

NOM

MAX

UNIT

VCCA

Analog supply voltage

3.0

3.3

3.6

VSSA

Analog ground

VREFHI

Analog supply reference source†

‡

VCCA

VREFLO

Analog ground reference source†

VSSA

VAI

Analog input voltage, ADCIN00−ADCIN07

VREFLO

VREFHI

† VREFHI and VREFLO must be stable, within ±1/2 LSB of the required resolution, during the entire conversion time.

‡ VREFHI can be from 2.0 V to VCCA; however, the accuracy of the ADC depends on the ground bounce and noise on the target board.

ADC operating frequency

MIN

MAX

UNIT

ADC operating frequency

MHz

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